1. Field of the Invention
The present invention relates generally to amplifiers and in particular to amplifier configurations capable of amplifying differential signals having associated common mode input voltages which exceed both the upper and lower power supply rails
2. Description of Related Art
Referring to the drawings, FIG. 1A is a simplified diagram of a common type of input stage of a differential amplifier. The input stage includes a pair of NPN transistors 10A/10B having their respective emitters connected to a common tail current source 12. A pair of load resistors RL1 and RL2 are connected intermediate the respective collector electrodes of the transistors and the upper supply rail Vdd. The input to the amplifier stage is a differential signal Vd, applied between the base electrodes of the transistors, and an associated common mode signal Vcm. The amplifier ideally amplifies the differential signal Vd and does not respond to the common mode signal Vcm. For proper operation, the common mode signal Vcm typically must remain at a voltage level intermediate the upper and lower power supply rails which, in this example, are Vdd and Gnd respectively. The differential signal Vd is not an issue since external feedback (not depicted) forces the voltage between the inputs to be relatively small.
The FIG. 1A common mode input Vcm can be increased up to, and slightly past, the upper supply rail Vdd and the stage will continue to operate. However, the common mode voltage Vcm must be sufficiently large so that the transistor that forms current source 12 does not saturate (collector-base junction forward biased), with that voltage typically being around +0.9 V. Thus, should the common mode voltage Vcm drop below +0.9 V, the input stage will no longer operate properly.
FIG. 1B shows another exemplary differential input stage which utilizes PNP transistors 14A/14B having their respective emitters connected to a common current source 16 (inputs Vd and Vcm not depicted). Load transistors RL3 and RL4 are connected between the respective collectors and the lower supply rail Gnd. In this configuration, the common mode input voltage Vcm can drop all the way to Gnd and slightly below. However, the common mode voltage Vcm must not exceed a value equal to Vdd less 0.9 V in order to insure that the current source 16 transistor does not saturate.
In order to maximize the common mode voltage operating range, it is possible to combine the features of the FIG. 1A/1B input stages, as shown in FIG. 1C. Two differential transistor pairs are used, including PNP pair 14A/14B and NPN pair 10A/10B. The PNP pair 14A/14B have emitters connected to a common current source 16 and the NPN pair 10A/10B have emitters connected to a common current source 12. The load circuitry for the two transistor pair is not depicted, but may be in the form of a folded cascode circuit.
Bias circuitry, also not depicted, operates so that the PNP pair 14A/14B are active when the common mode voltage Vcm is in a range from about Vdd/2 and Gnd and so that the NPN pair 10A/10B are active when the common mode voltage Vcm is in a range from about Vdd to Vdd/2. Preferably there is an overlap area near Vdd/2 when both pair are active. Thus, the common mode voltage range will extend from a value slightly greater than Vdd down a value slightly lower than Gnd.
FIG. 2A is a simplified diagram of a further differential amplifier input stage comprised of PNP transistors 18A, 18B, 18C and 18D connected in a common base configuration. As will be explained, this input stage configuration is capable of operating with common mode input voltages greater than the positive power supply rail voltage Vdd.
Transistors 18A and 18D form the input differential transistor pair, with diode-connected transistors 18B and 18C functioning to determine the input transistor current biasing level. The total current is set by a current source 20 which is split equally between the two halves of the input stage. The emitter area ratio of transistors 18A/18B (or 18D/18C) sets the bias current and consequently the transconductance gain of the transistors. The outputs Out+ and Out− can go to a folded cascode stage (not depicted). In this configuration, if the base-collector junctions of transistors 18A and 18D and the circuitry implementing current source 20 can sustain high voltages, the two inputs In+and In− can be pulled up beyond the positive supply rail, with the limit being set by the break down voltage of these base-collector junctions and current source transistors.
FIG. 2B is a simplifier diagram of another input stage capable of operating with common mode input voltages down to and slightly less than the negative supply rail Vdd. This input stage, which is the complement of the FIG. 2A input stage, includes four common base configured NPN transistors 22A, 22B, 22C and 22D. Once again, the diode-connected transistors 22B and 22C function to provide biasing to the input transistor pair 22A and 22D. The outputs Out+and Out− can be coupled to a folded cascode stage (not depicted). One common approach to provide high voltage capability in epitaxial processes is to fabricate each device (bipolar, MOS transistors and DMOS transistors) in a separate epitaxial pocket (N type growth on a P type substrate). In order to isolate the pockets and sustain high voltages, the pockets are surrounded by P type rings connected to the P type wafer substrate. As a result, the collectors on NPN transistors 22A and 22B located in the isolated pockets cannot be brought below ground level Vdd since doing so would forward bias the PN junction formed by the N type collector and the P type isolation ring connected to the substrate. Thus, the inputs In+and In− can only go down to the circuit common Vdd and a few millivolts below, otherwise the collector/isolation PN junction will be forward biased.
Current sense amplifiers have input stages that are frequently required to operate over a wide range of common mode inputs. Current sense amplifiers are typically used to amplify small differential signals across a shunt resistor in which a current to be measured flows. FIG. 3 shows an exemplary prior art current sensing circuitry which includes, among other things, a current sense amplifier 26 and a shunt resistor Rs through which a current to be measured, Ishunt, flows. In many applications, the small signal developed across Rs can have a much larger common mode component. By way of example, in many battery operated systems such as laptop computers and power tools, it is necessary to measure current flow from the battery into the associated load. In a common configuration, the battery voltage can be much larger that the voltage of the power supply associated with the analog/digital circuitry in the system, including the current sense amplifier 26. Thus, a battery may be made up several cells arranged in a stack configuration so as to generate +15 volts. Depending upon the location of the shunt resistor Rs relative to the load and battery, the common mode voltage at the shunt resistor terminals may be close to the battery voltage of +15 V. The current sense amplifier 26 and other analog/digital circuitry are typically powered by a much lower voltage Vdd such as +5 V, +3.6 V or +1.8 V produced by a voltage regulator powered by the battery. In that case, the high common mode voltage of +15V would not be compatible with current amplifier 26 if applied directly to the amplifier inputs since amplifier circuitry would not normally function with input voltages that are outside the power supply voltage Vdd and ground (Gnd). In addition, such a high voltage could damage the amplifier 26 input circuitry.
Another prior art approach to addressing this common mode voltage problem associated with current sense amplifiers is also shown in FIG. 3. A level shift circuit in the form of a resistor bridge, made up of resistors R1, R2, R5 and R6, is used to isolate the high common mode voltages which may be present at shunt resistor Rs. The voltage Vref connected to resistor R4 is typically the circuit common (Gnd) or one-half the supply voltage Vdd. The goal is to maintain the input voltages of amplifier 26 between the power supply rails which are Vdd and ground (Gnd) in this example. Typically, resistors R1 and R2 are of equal values as are resistors R3 and R4 and resistors R5 and R6. The magnitude of the level shift or attenuation factor is approximately set by the resistance ratio of R1/R5 (or R2/R6). Thus, assuming that the common mode voltage at shunt resistor Rs is +15 V and assuming that the amplifier 26 supply voltage Vdd is +5, the resistance ratio should be around 7.5 so that the common mode voltage is shifted down to one-half the supply voltage Vdd, that is, down to +2.5 V.
Assuming that a 5V process is used to fabricate the FIG. 3 circuitry, there is an initial constraint that the resistors should be realized with poly or thin-film since this approach does not require any high voltages to be applied to any junction towards the substrate of the die. Generally the FIG. 3 approach is an effective way to protect amplifier 26 which is usually a circuit fabricated using high-precision, low voltage processes. However, an analysis of the level shifting approach of FIG. 3 reveals at least three serious shortcomings. First, the input offset voltage of amplifier 26 is amplified directly in proportion to the attenuation factor. Second, the amplifier input noise is amplified directly in proportion to the attenuation factor. Third, the −3 dB bandwidth of the amplifier is reduced in direct proportion to the attenuation factor.
A further solution to increasing the common mode input range of an amplifier is based upon the use of various high voltage processes known in the semiconductor industry. However, these processes provide only a moderate integration density which places a severe trade-off between circuit complexity (i.e., functionalities like digital output, multiple gain configurability, fault detection and the like). As a result of this and other factors, it is believed that the majority of current sense amplifiers used in high performance battery operated systems utilize low-voltage, high density processes.
There is a need for amplifier circuitry having a wide common mode input range without sacrificing input offset, bandwidth and noise performance. As will become apparent to those skilled in the art after reading the following Detailed Description of the Invention together with the drawings, the present invention addresses these needs.